GainSight — data lifetime profiling for heterogeneous on-chip memory

Research project, first author and lead developer, Stanford University

GainSight extracts cycle-accurate data lifetimes from accelerator workloads and correlates them against emerging memory device characteristics to generate optimal heterogeneous on-chip memory compositions. Retargetable simulator backends feed an architecture-agnostic analytical frontend, so the same analysis applies across very different accelerator shapes. I have been the first author and lead developer since 2024.

How it works

What it found

Across MLPerf Inference and PolyBench, 64.3% of first-level GPU cache accesses and 79% of systolic-array scratchpad accesses have sub-microsecond lifetimes. Memory that is provisioned to hold data for milliseconds is therefore overprovisioned in retention for most of what it stores. Composing the on-chip hierarchy from denser, shorter-retention devices instead reaches up to 3× active energy and 4× area reduction against a uniform SRAM baseline.

Where it has been used

Paper and code

The framework is described in GainSight: A Unified Framework for Data Lifetime Profiling and Heterogeneous Memory Composition.

The work was funded under a US Department of Defense microelectronics program and the paper carries a public-release distribution statement. The published paper points at a source repository in my former research group’s namespace, which I no longer control; I am mirroring the code to my own account and this page will link there once that is done.